A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/μs Slope and 1.2GHz Chirp Bandwidth

Renukaswamy, P. (Speaker), Nereo Markulic (Contributor), Park, S. (Contributor), Kankuppe Raghavendra Swamy, A. (Contributor), Qixian Shi (Contributor), Wambacq, P. (Contributor), Jan Craninckx (Contributor)

Activity: Talk or presentationTalk or presentation at a conference

Period18 Feb 2020
Event typeConference
Conference number17
LocationSAN FRANCISCO, Belgium
Degree of RecognitionInternational