3D technologies for analog/RF applications

A. Vandooren, B. Parvais, L. Witters, A. Walke, A. Vais, C. Merckling, D. Lin, N. Waldron, P. Wambacq, D. Mocuta, N. Collaert

Research output: Chapter in Book/Report/Conference proceedingConference paper

1 Citation (Scopus)

Abstract

In this work, we will review possible technology options for next generation wireless communication. Next to the introduction of specific device architectures and materials, dissimilar from standard Si CMOS, the challenge will lie in the co-integration of these non-Si technologies with CMOS to enable power efficient systems with high performance, in this case high speed and output power, and reduced form factor. Next to monolithic integration, sequential 3D, currently been investigated for LOGIC density scaling, can be one of the enablers, allowing to combine technologies with very different needs at a finer grain and thus higher density than traditional 3D-SOC and 3D-IC technologies.

Original languageEnglish
Title of host publication2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-3
Number of pages3
Volume2018-March
ISBN (Electronic)9781538637654
ISBN (Print)9781538637654
DOIs
Publication statusPublished - 7 Mar 2018
Event2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 - Burlingame, United States
Duration: 16 Oct 201718 Oct 2017

Publication series

Name2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
Volume2018-March

Conference

Conference2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
CountryUnited States
CityBurlingame
Period16/10/1718/10/17

Keywords

  • III-V
  • monolithic integration
  • sequential 3D

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