A 28nm 6.5-8.1GHz 1.16mW/qubit Cryo-CMOS System-on-Chip for Superconducting Qubit Readout

Steven Van Winckel, Alican Caglar, Benjamin Gys, Steven Brebels, Anton Potocnik, Bertrand Parvais, Piet Wambacq, Jan Craninckx

Research output: Chapter in Book/Report/Conference proceedingConference paperResearch

1 Citation (Scopus)

Abstract

This paper presents a 28 nm cryo-CMOS system-on-chip (SoC) for the dispersive readout of superconducting qubits operating between 6.5-8.1 GHz at 4 K. The SoC includes a quadrature VCO and a full zero-IF transmitter and receiver chain, including 200 MS/s7-bit DACs, ADCs, and digital. It can generate pulses up to 640 ns duration, and it attains a very low-power readout operation (9.8 mW) compared to its counterparts with 0.5-0.6 dB noise figure, 65-89 dB gain, and-71 dBm maximum TX output power at 4 K. Furthermore, with its duty-cycled mode, the SoC reduces the average power dissipation for the readout application.

Original languageEnglish
Title of host publicationESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)
PublisherIEEE
Pages61-64
Number of pages4
ISBN (Electronic)9781665484947
DOIs
Publication statusPublished - 19 Sep 2022
EventESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) -
Duration: 19 Sep 202222 Sep 2022

Publication series

NameESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings

Conference

ConferenceESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)
Abbreviated titleESSCIRC 2022
Period19/09/2222/09/22

Bibliographical note

Publisher Copyright:
© 2022 IEEE.

Copyright:
Copyright 2022 Elsevier B.V., All rights reserved.

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