A 55–63 GHz fundamental Quad-Core VCO with NMOS-only stacked oscillator in 28 nm CMOS

Sriram Balamurali, Cheng-Hsueh Tsai, Giovanni Mangraviti, Piet Wambacq, Jan Craninckx

Research output: Chapter in Book/Report/Conference proceedingConference paperResearch

2 Citations (Scopus)

Abstract

This paper presents a 55-63GHz fundamental multicore VCO in a 28nm bulk CMOS process. The single-core VCO is made by stacking and magnetically coupling two NMOS-based resonators for reliability and increasing the tank energy for phase noise reduction. Potential parasitic modes which occur both in single-core and multi-core configuration are suppressed by design. The four in-phase LO outputs can also be used for LO distribution in millimeter-wave systems. The prototype achieves phase noise of -95 and -121.7dBc/Hz at 1MHz and 10MHz offset from the carrier at 55GHz with a 13.4% tuning range. The corresponding peak FOM achieved is 178dBc/Hz and 184.7dBc/Hz at 1MHz and 10MHz offset from the carrier.
Original languageEnglish
Title of host publicationA 55–63 GHz fundamental Quad-Core VCO with NMOS-only stacked oscillator in 28 nm CMOS
PublisherIEEE
Pages295-298
Number of pages4
ISBN (Electronic)9781665437479
DOIs
Publication statusPublished - 13 Sep 2021
EventIEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021 -
Duration: 13 Sep 202122 Sep 2021

Publication series

NameESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings

Conference

ConferenceIEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021
Period13/09/2122/09/21

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