A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS

Anirudh Kankuppe Raghavendra Swamy, Sehoon Park, Kristof Vaesen, Dae-Woong Park, Barend van Liempd, Siddhartha Sinha, Piet Wambacq, Jan Craninckx

Research output: Contribution to journalSpecial issuepeer-review

14 Citations (Scopus)

Abstract

A 139.5-157.7-GHz D-band I/Q radar receiver with an on-chip antenna and a spillover resilient N-path baseband filter is presented. Spillover and its manifestation based on the chirp duration are discussed, and a filter for spillover mitigation is implemented. The radar is characterized by 18-GHz radio frequency (RF) bandwidth, 13-mm range resolution, 55-dB conversion gain, 8-dB NF, and 26-dB narrowband spillover attenuation. The receiver is also capable of selectively mitigating close-by large reflectors, and the system power consumption is 67 mW.
Original languageEnglish
Pages (from-to)1982-1996
Number of pages15
JournalIEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume57
Issue number7
DOIs
Publication statusPublished - Jul 2022

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  • A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS

    Kankuppe Raghavendra Swamy, A., Park, S., Vaesen, K., Park, D-W., van Liempd, B., Wambacq, P. & Craninckx, J., 13 Sep 2021, IEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021. IEEE, p. 471-474 4 p. (ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings).

    Research output: Chapter in Book/Report/Conference proceedingConference paper

    4 Citations (Scopus)

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