A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS

Anirudh Kankuppe Raghavendra Swamy, Sehoon Park, Kristof Vaesen, Dae-Woong Park, Barend van Liempd, Piet Wambacq, Jan Craninckx

Research output: Chapter in Book/Report/Conference proceedingConference paper

2 Citations (Scopus)

Abstract

A 139.5-157.7 GHz D-band I/Q radar receiver with an on-chip antenna and a spillover resilient N-path baseband filter is presented. Spillover and its manifestation based on the chirp rate is discussed and a filter for spillover mitigation is implemented. The radar is characterized with 55 dB conversion gain, 8dB NF (5.6 dB EINF) and 26dB narrow-band spillover attenuation. The receiver is also capable of selectively mitigating very close by large reflectors and the system power consumption is 67mW.
Original languageEnglish
Title of host publicationIEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021
PublisherIEEE
ChapterIEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021
Pages471-474
Number of pages4
ISBN (Electronic)9781665437479
DOIs
Publication statusPublished - 13 Sep 2021
EventIEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021 -
Duration: 13 Sep 202122 Sep 2021

Publication series

NameESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings

Conference

ConferenceIEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021
Period13/09/2122/09/21

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