A Lost Cycles Analysis for Performance Prediction using High-Level Synthesis

Research output: Chapter in Book/Report/Conference proceedingConference paper

1 Citation (Scopus)

Abstract

oday’s High-Level Synthesis (HLS) tools significantly reduce the development time and offer a fast design-space exploration of compute intensive applications. The difficulty, however, to properly select the HLS optimizations leading to a high-performance design implementation drastically increases with the complexity of the application. In this paper we propose as extension for HLS tools a performance prediction for compute intensive applications consisting of multiple loops. We affirm that accurate performance predictions can be obtained by identifying and estimating all overheads instead of directly modelling the overall execution time. Such performance prediction is based on a cycle analysis and modelling of the overheads using the current HLS tools’ features. As proof of concept, our analysis uses Vivado HLS to predict the performance of a single-floating point matrix multiplication. The accuracy of the results demonstrates the potential of such kind of analysis.
Original languageEnglish
Title of host publicationA Lost Cycles Analysis for Performance Prediction using High-Level Synthesis
Place of PublicationSpringer International Publishing Switzerland
PublisherSpringer
Pages 334-342
Number of pages8
Volume9625
Edition2016
ISBN (Electronic)978-3-319-30481-6
ISBN (Print)978-3-319-30480-9
Publication statusPublished - 2016
Event12th International Symposium, ARC 2016 - Rio de Janeiro, Mangaratiba, Brazil
Duration: 22 Mar 201624 Mar 2016

Publication series

NameLecture Notes in Computer Science
PublisherSpringer International Publishing
Volume9625
ISSN (Print)0302-9743

Conference

Conference12th International Symposium, ARC 2016
Country/TerritoryBrazil
CityMangaratiba,
Period22/03/1624/03/16

Keywords

  • High-Level Synthesis
  • Lost cycles
  • FPGA
  • Performance prediction
  • Overhead analysis

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