Analysis of Gate-Metal Resistance in CMOS-Compatible RF GaN HEMTs

R. Y. ElKashlan, R. Rodriguez, S. Yadav, A. Khaled, U. Peralagu, A. Alian, N. Waldron, M. Zhao, P. Wambacq, B. Parvais, N. Collaert

Research output: Contribution to journalArticle

Abstract

To enable CMOS-compatible GaN HEMTs for the next generation of communication systems (5G and beyond), a low gate resistance is of great importance since it directly affects the RF power gain and fMAX of the transistor. In this article, the impact of various gate-metal stacks on the gate resistance and RF performance of the devices is studied. The optimized Ti-free gate-metal process leads to fMAX enhancement up to ~50% for devices scaled down to 0.32-μm gate lengths. The gate resistance for the T-shaped gate is modeled from the S-parameters and validated on various gate field plate geometries. The tradeoff between the gate resistance and the parasitic capacitance in GaN HEMTs is highlighted in this case.
Original languageEnglish
Article number9186848
Pages (from-to)4592-4596
Number of pages5
JournalIEEE Transactions on Electron Devices
Volume67
Issue number11
DOIs
Publication statusPublished - Nov 2020

Keywords

  • Gate resistance
  • RF GaN HEMTs on Si
  • microwave and millimeter-wave
  • Electrical resistance measurement
  • HEMTs
  • Gallium nitride
  • Radio frequency

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