@inproceedings{17d5ed14d2ac474795aac0624c8522c4,
title = "Comparing and combining GPU and FPGA accelerators in an image processing context",
abstract = "Nowadays, processors alone cannot deliver what computation hungry image processing applications demand. An alternative is to use hardware accelerators such as Graphics Processing Units (GPUs) or Field Programmable Gate Arrays (FPGAs). Applications, however, exhibit different performance characteristics depending on the accelerator. This paper describes the hybrid platform and the programming environment that allows to efficiently create programs on a combined GPU/FPGA desktop. We use the roofline model to identify the most appropriate accelerator for each application and High-Level Synthesis (HLS) tools to reduce the FPGA development time. To introduce our platform and tool chain both accelerators are compared by implementing a basic image operation. Next, a promising algorithm is explored and implemented, splitting and distributing the work between GPU, FPGA and CPU in order to validate the hybrid concept. Our results show that their combination exhibits a higher performance for computational intensive image processing applications than a GPU only.",
keywords = "High-Level Synthesis, FPGA, GPU, Roofline Model",
author = "{Da Silva Gomez}, Bruno and An Braeken and Erik D'hollander and Abdellah Touhafi and Cornelis, {Jan G.} and Jan Lemeire",
year = "2013",
month = sep,
day = "2",
language = "English",
isbn = "978-1-4799-0004-6",
series = "23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013",
publisher = "IEEE Circuits & Systems Society",
pages = "1--4",
booktitle = "23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013",
note = "23rd International Conference on Field programmable Logic and Applications ; Conference date: 02-09-2013 Through 04-09-2013",
}