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High-speed wireless communication in the post-5G era will likely make use of frequency bands above 100 GHz. This poses challenges to IC design in silicon technologies. This paper presents a general comparison of a D-band transformer-based Class-AB power ampliﬁer with cross-coupled capacitive neutralization in three advanced silicon technologies: bulk CMOS, fullydepleted SOI, and SiGe BiCMOS. Each of these technologies has its own prospects and disadvantages. A comparison of performance parameters is made such as the maximum available power gain Gmax , saturation power Psat , drain efﬁciency DE and power added efﬁciency PAE after properly sizing the transistors to reach an optimum load resistance Ropt . Further, a 140 GHz 4-stage power ampliﬁer is fabricated in a 28 nm bulk CMOS process as a reference. Its design considerations, layout parasitics analysis, and layout techniques are discussed as well.
|Title of host publication||2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)|
|Number of pages||4|
|Publication status||Published - 23 Jun 2019|
|Event||2019 17th IEEE International New Circuits and Systems Conference (NEWCAS) - Munich, Germany, Munich, Germany|
Duration: 23 Jun 2019 → 26 Jun 2019
|Conference||2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)|
|Period||23/06/19 → 26/06/19|
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