Environmental Sound Recognition on Embedded Systems: From FPGAs to TPUs

Jurgen Vandendriessche; Nick Wouters; Bruno da Silva; Mimoun Lamrini; Mohamed Yassin Chkouri; Abdellah Touhafi

doi:10.3390/electronics10212622

Environmental Sound Recognition on Embedded Systems: From FPGAs to TPUs

Jurgen Vandendriessche, Nick Wouters, Bruno da Silva, Mimoun Lamrini, Mohamed Yassin Chkouri, Abdellah Touhafi

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

In recent years, Environmental Sound Recognition (ESR) has become a relevant capability for urban monitoring applications. The techniques for automated sound recognition often rely on machine learning approaches, which have increased in complexity in order to achieve higher accuracy. Nonetheless, such machine learning techniques often have to be deployed on resource and power-constrained embedded devices, which has become a challenge with the adoption of deep learning approaches based on Convolutional Neural Networks (CNNs). Field-Programmable Gate Arrays (FPGAs) are power efficient and highly suitable for computationally intensive algorithms like CNNs. By fully exploiting their parallel nature, they have the potential to accelerate the inference time as compared to other embedded devices. Similarly, dedicated architectures to accelerate Artificial Intelligence (AI) such as Tensor Processing Units (TPUs) promise to deliver high accuracy while achieving high performance. In this work, we evaluate existing tool flows to deploy CNN models on FPGAs as well as on TPU platforms. We propose and adjust several CNN-based sound classifiers to be embedded on such hardware accelerators. The results demonstrate the maturity of the existing tools and how FPGAs can be exploited to outperform TPUs

Original language	English
Article number	2622
Pages (from-to)	1-32
Number of pages	32
Journal	Electronics (Switzerland)
Volume	10
Issue number	21
DOIs	https://doi.org/10.3390/electronics10212622
Publication status	Published - 1 Nov 2021

Bibliographical note

Funding Information:
Funding: This work is part of the COllective Research NETworking (CORNET) project “AITIA: Embedded AI Techniques for Industrial Applications” [52]. The Belgian partners are funded by VLAIO under grant number HBC.2018.0491, while the German partners are funded by the BMWi (Federal Ministry for Economic Affairs and Energy) under IGF-Project Number 249 EBG. The authors would like to thank Xilinx for the provided software and hardware under the Xilinx University Program donation.

Funding Information:
This work is part of the COllective Research NETworking (CORNET) project “AITIA: Embedded AI Techniques for Industrial Applications” [52]. The Belgian partners are funded by VLAIO under grant number HBC.2018.0491, while the German partners are funded by the BMWi (Federal Ministry for Economic Affairs and Energy) under IGF-Project Number 249 EBG. The authors would like to thank Xilinx for the provided software and hardware under the Xilinx University Program donation.

Publisher Copyright:
© 2021 by the authors. Licensee MDPI, Basel, Switzerland.

Copyright:
Copyright 2021 Elsevier B.V., All rights reserved.

Keywords

environmental sound recognition
hls4ml
Vitis AI
DPU
TPU
FPGA
embedded systems
neural networks
supervised learning

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10.3390/electronics10212622Licence: Unspecified

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Cite this

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title = "Environmental Sound Recognition on Embedded Systems: From FPGAs to TPUs",

abstract = "In recent years, Environmental Sound Recognition (ESR) has become a relevant capability for urban monitoring applications. The techniques for automated sound recognition often rely on machine learning approaches, which have increased in complexity in order to achieve higher accuracy. Nonetheless, such machine learning techniques often have to be deployed on resource and power-constrained embedded devices, which has become a challenge with the adoption of deep learning approaches based on Convolutional Neural Networks (CNNs). Field-Programmable Gate Arrays (FPGAs) are power efficient and highly suitable for computationally intensive algorithms like CNNs. By fully exploiting their parallel nature, they have the potential to accelerate the inference time as compared to other embedded devices. Similarly, dedicated architectures to accelerate Artificial Intelligence (AI) such as Tensor Processing Units (TPUs) promise to deliver high accuracy while achieving high performance. In this work, we evaluate existing tool flows to deploy CNN models on FPGAs as well as on TPU platforms. We propose and adjust several CNN-based sound classifiers to be embedded on such hardware accelerators. The results demonstrate the maturity of the existing tools and how FPGAs can be exploited to outperform TPUs",

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author = "Jurgen Vandendriessche and Nick Wouters and {da Silva}, Bruno and Mimoun Lamrini and Chkouri, {Mohamed Yassin} and Abdellah Touhafi",

note = "Funding Information: Funding: This work is part of the COllective Research NETworking (CORNET) project “AITIA: Embedded AI Techniques for Industrial Applications” [52]. The Belgian partners are funded by VLAIO under grant number HBC.2018.0491, while the German partners are funded by the BMWi (Federal Ministry for Economic Affairs and Energy) under IGF-Project Number 249 EBG. The authors would like to thank Xilinx for the provided software and hardware under the Xilinx University Program donation. Funding Information: This work is part of the COllective Research NETworking (CORNET) project “AITIA: Embedded AI Techniques for Industrial Applications” [52]. The Belgian partners are funded by VLAIO under grant number HBC.2018.0491, while the German partners are funded by the BMWi (Federal Ministry for Economic Affairs and Energy) under IGF-Project Number 249 EBG. The authors would like to thank Xilinx for the provided software and hardware under the Xilinx University Program donation. Publisher Copyright: {\textcopyright} 2021 by the authors. Licensee MDPI, Basel, Switzerland. Copyright: Copyright 2021 Elsevier B.V., All rights reserved.",

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Environmental Sound Recognition on Embedded Systems: From FPGAs to TPUs

Abstract

Bibliographical note

Keywords

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