Frequency Evaluation of the Xilinx DPU Towards Energy Efficiency

Embedded Artificial Intelligence (AI) and the use of deep neural networks on embedded devices is becoming increasingly popular. The rise in popularity comes from the advantages gained from executing inference locally, such as privacy, and the increase in available platforms to accelerate AI. An example of such platforms are Field Programmable Gate Arrays (FPGAs). The flexibility of FPGAs resulted in the development of several accelerators for AI. One of these tools that is gaining more and more interest is Xilinx Vitis AI, which uses a configurable Deep Processing Unit (DPU) in an FPGA. The DPU is not only scalable in resource consumption, but also the frequency at which it operates. In this paper, the influence on the power and energy consumption of the DPU is investigated for different DPU configurations and frequencies. As a result, it is shown that increasing the frequency of the DPU can compensate a reduction in resource consumption. Furthermore, an increase in resources and frequency can result in an overall lower energy consumption due to a higher power consumption for a shorter time.