Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS

Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, J. Craninckx

Research output: Chapter in Book/Report/Conference proceedingConference paper

13 Citations (Scopus)

Abstract

An 8-phase phase-aligned ring oscillator in 90 nm digital CMOS is presented that operates up to 2 GHz. The low-complexity circuit consumes 13 mW at 2 GHz and 1.2 mW at 400 MHz, while a flat in-band phase noise below -120 dBc/Hz is achieved, in close agreement with the presented theory. The circuit occupies an area of 0.008 mm(2).
Original languageEnglish
Title of host publicationProceedings of ESSCIRC 2008
PublisherIEEE
Pages410-413
Number of pages8
ISBN (Electronic)978-1-4244-2362-0
ISBN (Print)978-1-4244-2361-3
Publication statusPublished - 15 Sept 2008
EventEuropean Solid-State Circuits Conference (ESSCIRC) - Edinburgh, Scotland
Duration: 15 Sept 200819 Sept 2008
http://www.esscirc.org
http://www.esscirc2008.org/

Other

OtherEuropean Solid-State Circuits Conference (ESSCIRC)
Period15/09/0819/09/08
OtherEuropean Solid-State Circuits Conference (ESSCIRC)
Internet address

Keywords

  • ring oscillator
  • realignment
  • Clock multiplier

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