Noise Analysis of Constant-Slope Voltage-to-Time Converters

Mattia Gerardi; Jorge Lagos; Piet Wambacq; Jan Craninckx

doi:10.1109/PRIME66228.2025.11203624

Noise Analysis of Constant-Slope Voltage-to-Time Converters

Mattia Gerardi
, Jorge Lagos
, Piet Wambacq
, Jan Craninckx

Research output: Chapter in Book/Report/Conference proceeding › Conference paper

Abstract

Voltage-to-time converters (VTCs) are critical components in time-domain (TD) analog-to-digital converters (ADCs). This paper addresses a gap in existing literature by analyzing noise in constant-slope (CS) VTCs. Noise contributions are examined across three operational phases: sampling, integration, and crossing-detection. Single-ended (SE) and common-mode (CM) integration approaches are compared, identifying the latter as effective in reducing noise. Moreover, it is shown that while the sampling and integration noise contributions are not affected by the VTC operating speed, faster VTCs suffer from a signal-to-noise ratio (SNR) degradation due to the crossing-detector (CD) noise contribution. Theoretical findings are validated through schematic-level simulations in a 22−nm FDSOI CMOS technology, observing agreement.

Original language	English
Title of host publication	2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025
Publisher	IEEE
Pages	1-4
Number of pages	4
ISBN (Electronic)	979-8-3315-0390-1
ISBN (Print)	979-8-3315-0391-8
DOIs	https://doi.org/10.1109/PRIME66228.2025.11203624
Publication status	Published - 21 Oct 2025
Event	2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME) - Caparena Hotel, Taormina, Italy Duration: 21 Sept 2025 → 24 Sept 2025 Conference number: 20 https://prime-conference.org/

Publication series

Name	2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025

Conference

Conference	2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)
Abbreviated title	PRIME
Country/Territory	Italy
City	Taormina
Period	21/09/25 → 24/09/25
Internet address	https://prime-conference.org/

Bibliographical note

Publisher Copyright:
© 2025 IEEE.

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10.1109/PRIME66228.2025.11203624

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Gerardi, M., Lagos, J., Wambacq, P., & Craninckx, J. (2025). Noise Analysis of Constant-Slope Voltage-to-Time Converters. In 2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025 (pp. 1-4). (2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025). IEEE. https://doi.org/10.1109/PRIME66228.2025.11203624

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title = "Noise Analysis of Constant-Slope Voltage-to-Time Converters",

abstract = "Voltage-to-time converters (VTCs) are critical components in time-domain (TD) analog-to-digital converters (ADCs). This paper addresses a gap in existing literature by analyzing noise in constant-slope (CS) VTCs. Noise contributions are examined across three operational phases: sampling, integration, and crossing-detection. Single-ended (SE) and common-mode (CM) integration approaches are compared, identifying the latter as effective in reducing noise. Moreover, it is shown that while the sampling and integration noise contributions are not affected by the VTC operating speed, faster VTCs suffer from a signal-to-noise ratio (SNR) degradation due to the crossing-detector (CD) noise contribution. Theoretical findings are validated through schematic-level simulations in a 22−nm FDSOI CMOS technology, observing agreement.",

author = "Mattia Gerardi and Jorge Lagos and Piet Wambacq and Jan Craninckx",

note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), PRIME ; Conference date: 21-09-2025 Through 24-09-2025",

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doi = "10.1109/PRIME66228.2025.11203624",

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isbn = "979-8-3315-0391-8",

series = "2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025",

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Gerardi, M, Lagos, J, Wambacq, P & Craninckx, J 2025, Noise Analysis of Constant-Slope Voltage-to-Time Converters. in 2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025. 2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025, IEEE, pp. 1-4, 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), Taormina, Italy, 21/09/25. https://doi.org/10.1109/PRIME66228.2025.11203624

Noise Analysis of Constant-Slope Voltage-to-Time Converters. / Gerardi, Mattia; Lagos, Jorge; Wambacq, Piet et al.
2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025. IEEE, 2025. p. 1-4 (2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025).

Research output: Chapter in Book/Report/Conference proceeding › Conference paper

TY - GEN

T1 - Noise Analysis of Constant-Slope Voltage-to-Time Converters

AU - Gerardi, Mattia

AU - Lagos, Jorge

AU - Wambacq, Piet

AU - Craninckx, Jan

N1 - Conference code: 20

PY - 2025/10/21

Y1 - 2025/10/21

N2 - Voltage-to-time converters (VTCs) are critical components in time-domain (TD) analog-to-digital converters (ADCs). This paper addresses a gap in existing literature by analyzing noise in constant-slope (CS) VTCs. Noise contributions are examined across three operational phases: sampling, integration, and crossing-detection. Single-ended (SE) and common-mode (CM) integration approaches are compared, identifying the latter as effective in reducing noise. Moreover, it is shown that while the sampling and integration noise contributions are not affected by the VTC operating speed, faster VTCs suffer from a signal-to-noise ratio (SNR) degradation due to the crossing-detector (CD) noise contribution. Theoretical findings are validated through schematic-level simulations in a 22−nm FDSOI CMOS technology, observing agreement.

AB - Voltage-to-time converters (VTCs) are critical components in time-domain (TD) analog-to-digital converters (ADCs). This paper addresses a gap in existing literature by analyzing noise in constant-slope (CS) VTCs. Noise contributions are examined across three operational phases: sampling, integration, and crossing-detection. Single-ended (SE) and common-mode (CM) integration approaches are compared, identifying the latter as effective in reducing noise. Moreover, it is shown that while the sampling and integration noise contributions are not affected by the VTC operating speed, faster VTCs suffer from a signal-to-noise ratio (SNR) degradation due to the crossing-detector (CD) noise contribution. Theoretical findings are validated through schematic-level simulations in a 22−nm FDSOI CMOS technology, observing agreement.

UR - https://www.scopus.com/pages/publications/105021618434

U2 - 10.1109/PRIME66228.2025.11203624

DO - 10.1109/PRIME66228.2025.11203624

M3 - Conference paper

SN - 979-8-3315-0391-8

T3 - 2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025

SP - 1

EP - 4

BT - 2025 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME 2025

PB - IEEE

T2 - 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)

Y2 - 21 September 2025 through 24 September 2025

ER -

Noise Analysis of Constant-Slope Voltage-to-Time Converters

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