Performance and Programming Environment of a Combined GPU/FPGA Desktop

Research output: Chapter in Book/Report/Conference proceedingChapter

1 Citation (Scopus)

Abstract

The performance and the versatility of today's PCs exceeds many times the power of the fastest number crunchers in the 90s. Yet the computational hunger of many scientific applications has led to the development of GPU- and FPGA-accelerator cards. In this paper the programming environment and the performance analysis of a super desktop with a combined GPU/FPGA architecture is presented. A unified roofline model is used to compare the performance of the GPU and the FPGA taking into account the computational intensity of the algorithm and the resource consumption. The model is validated by two image processing kernels which are compiled using OpenCL for the GPU and a C-to-VHDL compiler for the FPGA. It is shown that an FPGA compiler outperforms handwritten code and is highly productive, but also uses more resources. While both the GPU and FPGA excel in particular applications, both devices suffer from the limited I/O bandwidth to the processor.
Original languageEnglish
Title of host publicationTransition of HPC Towards Exascale Computing
EditorsErik D'Hollander, Jack J. Dongarra, Ian T. Foster, Lucio Grandinetti, Gerhard R. Joubert
Place of PublicationAmsterdam
PublisherIOS Press
Pages177-193
Number of pages17
ISBN (Print)978-1-61499-323-0
Publication statusPublished - 2013

Publication series

NameAdvances in Parallel Computing
Volume24

Keywords

  • accelerator architectures
  • programming environment
  • Performance
  • roofline model
  • FPGA
  • GPU

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