A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/μs Slope and 1.2GHz Chirp Bandwidth
- Pratap Renukaswamy (Speaker)
- Markulic, N. (Contributor)
- Sehoon Park (Contributor)
- Anirudh Kankuppe Raghavendra Swamy (Contributor)
- Qixian Shi (Contributor)
- Wambacq, P. (Contributor)
- Jan Craninckx (Contributor)
Activiteit: Talk or presentation at a conference