A +70-dBm IIP3 Electrical-Balance Duplexer for Highly Integrated Tunable Front-Ends

Barend van Liempd, Benjamin Hershberg, Saneaki Ariumi, Kuba Raczkowski, Karl-Frederik Bink, Udo Karthaus, Ewout Martens, Piet Wambacq, Jan Craninckx

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56 Citaten (Scopus)
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Samenvatting

An electrical-balance duplexer achieving the state-of-the-art linearity and insertion loss (IL) performance is presented, enabled by a partially depleted RF silicon-on-insulator CMOS technology. A single-ended configuration avoids the common-mode isolation problem suffered by topologies with a differential low-noise amplifier. Highly linear switched capacitors allow for impedance balancing to antennas with <1.5:1 voltage standing wave ratio from 1.9 to 2.2 GHz. +70-dBm input-referred third-order intercept point is achieved under high transmitter (TX) power (+30.5 dBm max.). TX IL is <3.7 dB, and receiver IL is <3.9 dB.
Originele taal-2English
Pagina's (van-tot)4274-4286
Aantal pagina's13
TijdschriftIEEE Transactions on Microwave Theory and Techniques
Volume64
Nummer van het tijdschrift12
DOI's
StatusPublished - 7 dec 2016

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